### Possible Answer

I've been trying to build a module which returns the two's complement representation of the (3-bit) input (first bit being the sign). I think that the following code ... Binary Multiplication, 2's complement - Stack... How to create 2's Complement Adder in Verilog? -... - read more

Verilog does not automatically sign extend nor does it assume that the numbers into the multiplier are twos-compliment. You may either have to create your own - read more

Please vote if the answer you were given helped you or not, thats the best way to improve our algorithm. You can also submit an answer or search documents about twos complement multiplication verilog.